How to achieve higher system efficiency- part two: high-speed gate drivers

It’s the new year and designers are still pursuing higher efficiency in their designs. In part one of this series, I discussed how high-current gate drivers can help systems achieve higher efficiency. High-speed gate drivers can accomplish the same.

A high-speed gate driver can increase efficiencies by reducing the power consumed from a FET’s body diode. A body diode is a parasitic diode, intrinsic to most types of FETs. It is formed by the p-n junction and sits between the drain and source. Figure 1 shows the body diode represented in a typical MOSFET circuit symbol.

Figure 1: MOSFET symbols including intrinsic body diode

Limiting the conduction time of the body diode will in turn reduce the power consumed across it. This is because the voltage drop across the body diode is typically higher than the voltage across the MOSFET when the MOSFET is in the on state. Since P = I x V (where P is power consumed, I is current, and V is the voltage drop) for the same current levels, the conduction losses through the MOSFET channel are significantly lower than through the body diode.

These concepts come into play in synchronous rectification of power electronic circuits. Synchronous rectification improves the efficiency of these circuits by replacing the diodes with an actively controlled device such as a power MOSFET. Reducing body-diode conduction maximizes the benefits of this technique.

Let’s consider a synchronous buck converter. The body diode of the low-side FET becomes forward-biased when the high-side FET turns off and there is still current in the inductor. After a small dead time, which is necessary to avoid shoot-through, the low-side FET turns on and starts conducting through its channel. The same principles apply to other synchronous half-bridge configurations, typically found in DC/DC power supplies and motor-drive designs.

An important gate-driver parameter responsible for high-speed turn-on is the turn-on propagation delay. This is the time between when a signal is applied at the input of the gate driver to the time that the output starts to go high. An example of this is shown in Figure 2. The idea is that as the FET switches back on, the body diode will switch off. Fast turn-on propagation delays enable quicker switching on of a FET, minimizing the conduction time of the body diode and thus minimizing losses.

Figure 2: Timing diagram where t_PDLH represents the turn-on propagation delay

TI’s portfolio includes gate drivers with industry-leading high-speed turn-on propagation delays. See Table 1.